STEC invented the concept of SSD/FLASH and DRAM stacking in 1995 and we have multiple patents covering this technology. We have built many millions of SSD/FLASH and DRAM stacks over the past 13 years.

We develop this by stacking two chips, one on top of each other, and connected by a "rail" board. Most of the address and data lines of the two chips are tied together with only the chip selects separated out electrically. When the module is in operation, either the top chip or the bottom chip is selected and the data is accessed.

The TSOP stacks have undergone extensive reliability testing to ensure long life operation without problems. Our quality and reliability department has subjected stacked modules to multiple tests in the following areas: temperature cycles, temperature humidity bias (THB), bend, torque, shock, vibration, and electrical characterization.