As the speed of the DRAM chips get faster and faster, overall power consumption continues to increase. This brings to the forefront a new concern in DRAM technology: thermal management. This problem is compounded by the ever increasing drive to reduce the size of the systems and pack more and more density into a smaller space. This requires system designers to measure and manage the heat that is generated by the DIMM module to make sure the DRAM modules remain within the temperature specifications for correct operation.

To solve this problem, STEC has developed DIMM modules that carry on-board thermal sensors. These sensors can sense the temperature of the DIMM module and report the information when interrogated over the I2C bus. These temperature sensors also contain limit comparator registers that will trigger an EVENT# signal when the temperature is raised over a pre-programmed limit. This EVENT# signal can be tied to the Interrupt line of the microprocessor so that a high temperature condition will be signaled without requiring software to poll the I2C bus.

The advantage of this solution is that it will allow the system to either change the speed of the fans or throttle back on the memory accesses to allow the memory to stay within temperature limits and prevent any reliability failures due to overheating.