In the case of a flash-based storage device, there is an additional complexity that needs to be properly addressed.

Each time the host writes a sector to the flash media, the embedded controller on the flash device computes an Error Correction Code (ECC). A power interruption can cause corruption of the ECC signature that is being written at the time. If the host tries to read that same sector on the next power on, the newly computed ECC signature will not match with the corrupted original ECC signature. As a consequence, the controller will assume that the target physical block in the flash is defective and it will proceed to retire the block.

The result of the power failure can then be data corruption as well as premature usage of precious spare block (128KB). Once all the spare blocks are consumed, the device stops operating and it needs to be replaced.

To avoid data corruption and unnecessary consumption of spare blocks, STEC implements a revolutionary algorithm that proactively avoids data corruption.

The algorithm is able to recognize when a power loss occurs and to check data integrity. In the event that information is found to be incomplete or corrupted, the algorithm is able to restore the last valid data.